Many important system level circuit functions, such as automatic gain control (AGC) and phase-locked loops (PLL), use the general control loop as shown in FIG. 1. The function block 10 would consist of a variable gain amplifier (VGA) in the case of a AGC loop, or a voltage controlled oscillator (VCO) in the case of a PLL system. The bias 12 to the function block 10 is controlled by a feedback loop (V.sub.sense) 14 which senses the current state of the function block, and compares it to the desired state (V.sub.ref) 16 resulting in an adjustment of the bias I.sub.Bias 12 by I.sub.Error 18 provided by the Gm block 20. The digital-to-analog converter (DAC) 22 generates the main bias current (I.sub.Center) 24 to the function block 10, and is adjustable through an external register. This programmable DAC extends the operational range of the function block, as well as, limits the gain and range of the Gm block needed for proper control loop functionality.
In the circuit described above, it is desirable to keep the Gm block operating at or near its zero differential operating point in order to maintain its optimal linearity and noise rejection characteristics. The farther the center current is from the desired bias current, the greater error current the Gm block must provide, and therefore must deviate from it's optimal operational point. If the DAC block could adjust or "adapt" the centering current, for which it provides, to the changing bias current needs of the function block, then the Gm block would need only provide the transitory error current for the loop during the acquisition period, and would always operate at it's zero differential point during steady state.